Laboratory Details
Lab. 1 -- VisualDSP++ familiarization.
- Build a VisualDSP++ project to run on the simulator and on the evaluation boards in ICT520
- Use the E-TDD environment to test your code from prelaboratory 1 assignment
- Demonstrate a software-defined radio written in C++ -- code running on the evaluation board.
Post Lab. 1 -- Demonstrate use of FIR working on 3-D array
- Inner loops using assembly code hardware loops
- Outer loop using assembly code software loop
compared to
- Outer loops using hardware loops
- Inner loop using assembly code software loop
Prelaboratory 2 assignment:- full class hand-in at the same time -- Simple test driven development exercise for FIR filter used in Lab. 2.
Lab. 2 -- Optimization techniques
- SISD processor operation
- SIMD processor operations
- Floating point compared to fractional integer
- Circular buffer
- Multiple memory access
Prelaboratory 3 assignment:- full class hand-in at the same time -- Simple test driven development exercise for FIR filter used in Lab. 3.
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Generating "C++" programs for signal processing needed for Lab. 3. To be used as "control" programs to provide results used to validate TigerSHARC assembly language programs used in Lab. 3
Lab. 3 -- Optimization techniques applied to signal processing algorithm
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Background DMA to store temperature signals into an array from a pair of TMP03 (pulse width modulated temperature sensor)
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Signal shaping (includes FIR operations)
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Graphing of differential temperatures
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Background DMA to store temperature signals into an array from a pair of TMP03 (pulse width modulated temperature sensor)
Prelaboratory 4 assignment:- full class hand-in at the same time -- Simple test driven development exercise for FIR filter used in Lab. 4.
Lab. 4 -- Dual processor operation -- Algorithm performed done across two TigerSHARC cores
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Same project as Lab. 3, except that now the code runs on 2 processor cores